esc_registers.h 6.37 KB
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/*
	Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2013
	Copyright Stichting C.A. Muller Radioastronomiestation, 2013

	This program is free software: you can redistribute it and/or modify
	it under the terms of the GNU General Public License as published by
	the Free Software Foundation, either version 3 of the License, or
	(at your option) any later version.

	This program is distributed in the hope that it will be useful,
	but WITHOUT ANY WARRANTY; without even the implied warranty of
	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
	GNU General Public License for more details.

	You should have received a copy of the GNU General Public License
	along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#ifndef _INCLUDE_EC_ESC_REGISTERS_H_
#define _INCLUDE_EC_ESC_REGISTERS_H_


#define ESC_ADDR_MAP_TYPE			0x0000
#define ESC_TYPE_ESC					0x02
#define ESC_TYPE_IPCORE					0x04
#define ESC_TYPE_ET1100					0x11
#define ESC_TYPE_ET1200					0x12
#define ESC_ADDR_MAP_REVISION			0x0001
#define ESC_ADDR_MAP_BUILD			0x0002
#define ESC_ADDR_MAP_FMMUS_SUPPORTED		0x0004
#define ESC_ADDR_MAP_SYNCMANAGERS_SUPPORTED	0x0005
#define ESC_ADDR_MAP_RAM_SIZE			0x0006
#define ESC_ADDR_MAP_FEATURES			0x0008
#define ESC_FEATURE_FMMU_BYTE_ORIENTED 		0x0001
#define ESC_FEATURE_DISTRIBUTED_CLOCKS			0x0004
#define ESC_FEATURE_64BIT_DISTRIBUTED_CLOCKS		0x0008
#define ESC_FEATURE_LOW_JITTER_EBUS			0x0010
#define ESC_FEATURE_ENHANCED_LINK_DETECTION_EBUS	0x0020
#define ESC_FEATURE_ENHANCED_LINK_DETECTION_MII		0x0040
#define ESC_FEATURE_SEPERATE_FCS_HANDLING		0x0080
#define ESC_FEATURE_ENHANCED_DC_SYNC_ACTIVATION		0x0100
#define ESC_ADDR_MAP_AL_CONTROL			0x0120
#define ESC_ADDR_MAP_AL_CONTROL_ERROR_ACK		0x0010
#define ESC_ADDR_MAP_AL_STATUS			0x0130
#define ESC_ADDR_MAP_AL_STATUS_ERR_IND			0x0010
#define ESC_ADDR_MAP_AL_STATUS_CODE		0x0134

#define ESC_ADDR_MAP_SYNC_LATCH_PDI_CONFIG	0x0151

#define ESC_ADDR_MAP_WATCHDOG_DIVIDER		0x0400
#define ESC_ADDR_MAP_WATCHDOG_TIME_PDI		0x0410
#define ESC_ADDR_MAP_WATCHDOG_TIME_PD		0x0420
#define ESC_ADDR_MAP_WATCHDOG_STATUS_PD		0x0440
#define ESC_ADDR_MAP_WATCHDOG_COUNTER_PD	0x0442
#define ESC_ADDR_MAP_WATCHDOG_COUNTER_PDI	0x0443

#define ESC_ADDR_MAP_ESI_EEPROM_CONFIG		0x0500
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#define ESC_ESI_EEPROM_CONFIG_REQUEST_ECAT		0x00
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#define ESC_ESI_EEPROM_CONFIG_PDI			0x01
#define ESC_ESI_EEPROM_CONFIG_FORCE_ECAT		0x02
#define ESC_ADDR_MAP_ESI_EEPROM_PDI_STATE	0x0501
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#define ESC_ESI_EEPROM_PDI_BUSY				0x01
#define ESC_ESI_EEPROM_FREE				0x00
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#define ESC_ADDR_MAP_ESI_EEPROM_CONTROL_STATUS	0x0502
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#define ESC_ESI_EEPROM_CONTROL_STATUS_READ_8B		0x0040
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#define ESC_ESI_EEPROM_CONTROL_STATUS_CMD_READ		0x0100
#define ESC_ESI_EEPROM_CONTROL_STATUS_CHKSUM_ERR	0x0800
#define ESC_ESI_EEPROM_CONTROL_STATUS_NOT_LOADED	0x1000
#define ESC_ESI_EEPROM_CONTROL_STATUS_ACK_ERR		0x2000
#define ESC_ESI_EEPROM_CONTROL_STATUS_WRITE_ERR		0x4000
#define ESC_ESI_EEPROM_CONTROL_STATUS_BUSY		0x8000
#define ESC_ADDR_MAP_ESI_EEPROM_ADDRESS		0x0504
#define ESC_ADDR_MAP_ESI_EEPROM_DATA		0x0508


#define ESC_ADDR_MAP_SYNCMANAGER			0x0800
#define ESC_ADDR_MAP_SYNCMANAGER_OFFSET			0x0008
#define ESC_ADDR_MAP_SYNCMANAGER_NR(nr)	\
	(ESC_ADDR_MAP_SYNCMANAGER + ESC_ADDR_MAP_SYNCMANAGER_OFFSET * (nr))
#define ESC_ADDR_MAP_SYNCMANAGER_PHYSICAL_START	0x0
#define ESC_ADDR_MAP_SYNCMANAGER_LENGTH		0x2
#define ESC_ADDR_MAP_SYNCMANAGER_CONTROL	0x4
#define ESC_SYNCMANAGER_CONTROL_MAILBOX			0x02
#define ESC_SYNCMANAGER_CONTROL_WRITE			0x04
#define ESC_SYNCMANAGER_CONTROL_INT_PDI			0x20
#define ESC_SYNCMANAGER_CONTROL_WATCHDOG_ENABLE		0x40
#define ESC_ADDR_MAP_SYNCMANAGER_STATUS		0x5
#define ESC_ADDR_MAP_SYNCMANAGER_ACTIVATE	0x6
#define ESC_SYNCMANAGER_ACTIVATE_ENABLE			0x01
#define ESC_ADDR_MAP_SYNCMANAGER_PDI_CONTROL	0x7

#define ESC_FMMU_MAX		16

#define ESC_ADDR_MAP_FMMU				0x0600
#define ESC_ADDR_MAP_FMMU_OFFSET			0x0010
#define ESC_ADDR_MAP_FMMU_NR(nr) \
	(ESC_ADDR_MAP_FMMU + ESC_ADDR_MAP_FMMU_OFFSET * (nr))
#define ESC_ADDR_MAP_FMMU_LOGICAL_START		0x00
#define ESC_ADDR_MAP_FMMU_LENGTH		0x04
#define ESC_ADDR_MAP_FMMU_LOGICAL_START_BIT	0x06
#define ESC_ADDR_MAP_FMMU_LOGICAL_STOP_BIT	0x07
#define ESC_ADDR_MAP_FMMU_PHYSICAL_START	0x08
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#define ESC_ADDR_MAP_FMMU_PHYSICAL_START_BIT	0x0a
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#define ESC_ADDR_MAP_FMMU_TYPE			0x0b
#define ESC_FMMU_TYPE_RD		0x01
#define ESC_FMMU_TYPE_WR		0x02
#define ESC_FMMU_TYPE_RW		0x03
#define ESC_ADDR_MAP_FMMU_ACTIVATE		0x0c
#define ESC_FMMU_ACTIVATE_ACTIVATED	0x01

#define ESC_ADDR_MAP_DC_SYSTEM_TIME		0x0910
#define ESC_ADDR_MAP_DC_SYSTEM_TIME_OFFSET	0x0920
#define ESC_ADDR_MAP_DC_SYSTEM_TIME_DIFFERENCE	0x092c
#define ESC_DC_SYSTEM_TIME_DIFFERENCE_SMALLER	0x80000000
#define ESC_DC_SYSTEM_TIME_DIFFERENCE_MEAN_MASK	0x7fffffff
#define ESC_ADDR_MAP_DC_CYCLIC_UNIT_CONTROL	0x0980
#define ESC_DC_CYCLIC_UNIT_CONTROL_LATCH0_PDI	0x10
#define ESC_DC_CYCLIC_UNIT_CONTROL_LATCH1_PDI	0x20
#define ESC_ADDR_MAP_DC_ACTIVATION_REGISTER	0x0981
#define ESC_ADDR_MAP_DC_PULSE_LENGTH		0x0982
#define ESC_ADDR_MAP_DC_ACTIVATION_STATUS	0x0984
#define ESC_ADDR_MAP_DC_START_TIME_CYCLIC_OPERATION	0x0990
#define ESC_ADDR_MAP_DC_SYNC0_CYCLE_TIME	0x09a0
#define ESC_ADDR_MAP_DC_SYNC1_CYCLE_TIME	0x09a4

#define ESC_DC_ACTIVATION_REGISTER_SYNC_OUT_ACTIVE	0x01
#define ESC_DC_ACTIVATION_REGISTER_SYNC0_ACTIVE		0x02
#define ESC_DC_ACTIVATION_REGISTER_SYNC1_ACTIVE		0x04
#define ESC_DC_ACTIVATION_REGISTER_AUTO_ACTIVATION	0x08
#define ESC_DC_ACTIVATION_REGISTER_START_TIME_PLAUSIBLE_CHECK	0x20
#define ESC_DC_EPOCH	(946684800)

#define ESC_ESI_ADDR_VENDORID		0x10
#define ESC_ESI_ADDR_PRODUCTCODE	0x14
#define ESC_ESI_ADDR_REVISIONNO		0x18
#define ESC_ESI_ADDR_SERIALNO		0x1c


#define ESC_ESI_BOOTSTRAP_RX_MAILBOX_OFFSET	(0x14*2)
#define ESC_ESI_BOOTSTRAP_RX_MAILBOX_SIZE	(0x15*2)
#define ESC_ESI_BOOTSTRAP_TX_MAILBOX_OFFSET	(0x16*2)
#define ESC_ESI_BOOTSTRAP_TX_MAILBOX_SIZE	(0x17*2)
#define ESC_ESI_STANDARD_RX_MAILBOX_OFFSET	(0x18*2)
#define ESC_ESI_STANDARD_RX_MAILBOX_SIZE	(0x19*2)
#define ESC_ESI_STANDARD_TX_MAILBOX_OFFSET	(0x1a*2)
#define ESC_ESI_STANDARD_TX_MAILBOX_SIZE	(0x1b*2)
#define ESC_ESI_MAILBOX_PROTOCOL		(0x1c*2)

#define ESC_ESI_ADDR_SIZE	(0x3e*2)
#define ESC_ESI_ADDR_VERSION	(0x3f*2)

#define ESC_ESI_FIRST_CATEGORY_TYPE	(0x40*2)


enum esc_esi_category_type {
	ESC_ESI_CATEGORY_STRINGS = 10,
	ESC_ESI_CATEGORY_GENERAL = 30,
	ESC_ESI_CATEGORY_FMMU = 40,
	ESC_ESI_CATEGORY_SYNCMANAGER = 41,
	ESC_ESI_CATEGORY_PDO_RX = 50,
	ESC_ESI_CATEGORY_PDO_TX = 51,
	ESC_ESI_CATEGORY_DCCLOCK = 60,
};

#endif /* _INCLUDE_EC_ESC_REGISTERS_H_ */