Commit 272fd3b6 authored by Jeroen Vreeken's avatar Jeroen Vreeken
Browse files

GPIO pin muxing for the am335x

parent 7090f939
......@@ -196,3 +196,97 @@ int am335x_pinmux_set(size_t offset, unsigned mode, unsigned flags)
return ret;
}
struct am335x_pinmux_gpio_entry {
int gpio;
int pin;
size_t offset;
};
static struct am335x_pinmux_gpio_entry am335x_pinmux_gpio_table[] = {
{ 0, 2, 0x150 },
{ 0, 3, 0x154 },
{ 0, 4, 0x158 },
{ 0, 5, 0x15c },
{ 0, 7, 0x164 },
{ 0, 8, 0x0d0 },
{ 0, 9, 0x0d4 },
{ 0, 10, 0x0d8 },
{ 0, 11, 0x0dc },
{ 0, 12, 0x178 },
{ 0, 13, 0x17c },
{ 0, 14, 0x180 },
{ 0, 15, 0x184 },
{ 0, 20, 0x1b4 },
{ 0, 22, 0x020 },
{ 0, 23, 0x024 },
{ 0, 26, 0x028 },
{ 0, 27, 0x02c },
{ 0, 30, 0x070 },
{ 0, 31, 0x074 },
{ 1, 0, 0x000 },
{ 1, 1, 0x004 },
{ 1, 2, 0x008 },
{ 1, 3, 0x00c },
{ 1, 4, 0x010 },
{ 1, 5, 0x014 },
{ 1, 6, 0x018 },
{ 1, 7, 0x01c },
{ 1, 12, 0x030 },
{ 1, 13, 0x034 },
{ 1, 14, 0x038 },
{ 1, 15, 0x03c },
{ 1, 16, 0x040 },
{ 1, 17, 0x044 },
{ 1, 18, 0x048 },
{ 1, 19, 0x04c },
{ 1, 29, 0x07c },
{ 1, 30, 0x080 },
{ 1, 31, 0x084 },
{ 2, 1, 0x08c },
{ 2, 2, 0x090 },
{ 2, 3, 0x094 },
{ 2, 4, 0x098 },
{ 2, 5, 0x09c },
{ 2, 6, 0x0a0 },
{ 2, 7, 0x0a4 },
{ 2, 8, 0x0a8 },
{ 2, 9, 0x0ac },
{ 2, 10, 0x0b0 },
{ 2, 11, 0x0b4 },
{ 2, 12, 0x0b8 },
{ 2, 13, 0x0bc },
{ 2, 14, 0x0c0 },
{ 2, 15, 0x0c4 },
{ 2, 16, 0x0c8 },
{ 2, 17, 0x0cc },
{ 2, 22, 0x0e0 },
{ 2, 23, 0x0e4 },
{ 2, 24, 0x0e8 },
{ 2, 25, 0x0ec },
{ 3, 14, 0x190 },
{ 3, 15, 0x194 },
{ 3, 16, 0x198 },
{ 3, 17, 0x19c },
{ 3, 18, 0x1a0 },
{ 3, 19, 0x1a4 },
{ 3, 20, 0x1a8 },
{ 3, 21, 0x1ac },
};
int am335x_pinmux_gpio_offset(int gpio, int pin, size_t *offset)
{
int ret = -1;
int i;
for (i = 0; i < sizeof(am335x_pinmux_gpio_table)/sizeof(struct am335x_pinmux_gpio_entry); i++) {
if (am335x_pinmux_gpio_table[i].gpio == gpio &&
am335x_pinmux_gpio_table[i].pin == pin) {
*offset = am335x_pinmux_gpio_table[i].offset;
ret = 0;
break;
}
}
return ret;
}
......@@ -38,6 +38,9 @@
#define AM335X_CM_MODULEMODE_DISABLE 0x00000000
#define AM335X_CM_MODULEMODE_ENABLE 0x00000002
#define AM335X_CM_PER_GPIO1_CLKCTRL 0x000000ac
#define AM335X_CM_PER_GPIO2_CLKCTRL 0x000000b0
#define AM335X_CM_PER_GPIO3_CLKCTRL 0x000000b4
#define AM335X_CM_PER_EPWMSS1_CLKCTRL 0x000000cc
#define AM335X_CM_PER_EPWMSS0_CLKCTRL 0x000000d4
#define AM335X_CM_PER_EPWMSS2_CLKCTRL 0x000000d8
......@@ -353,5 +356,6 @@ void *am335x_mem(size_t base, size_t size);
int am335x_cm_enable(size_t cm_off);
int am335x_pinmux_set(size_t offset, unsigned mode, unsigned flags);
int am335x_pinmux_gpio_offset(int gpio, int pin, size_t *offset);
#endif /* _INCLUDE_AM335X_ */
......@@ -59,6 +59,8 @@ static struct controller_block * block_am335x_gpi_create(char *name, int argc, v
int gpi_nr;
int pin_nr;
size_t offset;
size_t pinmux_off;
int ret;
gpi_nr = va_arg(ap, int);
if (gpi_nr < 0 || gpi_nr > 3) {
......@@ -69,17 +71,25 @@ static struct controller_block * block_am335x_gpi_create(char *name, int argc, v
switch (gpi_nr) {
case 0:
offset = AM335X_GPIO0_BASE;
ret = 0;
break;
case 1:
offset = AM335X_GPIO1_BASE;
ret = am335x_cm_enable(AM335X_CM_PER_GPIO1_CLKCTRL);
break;
case 2:
offset = AM335X_GPIO2_BASE;
ret = am335x_cm_enable(AM335X_CM_PER_GPIO2_CLKCTRL);
break;
case 3:
offset = AM335X_GPIO3_BASE;
ret = am335x_cm_enable(AM335X_CM_PER_GPIO3_CLKCTRL);
break;
}
if (ret) {
log_send(LOG_T_ERROR, "%s: Could not enable clock", name);
return NULL;
}
pin_nr = va_arg(ap, int);
if (pin_nr < 0 || pin_nr > 31) {
......@@ -88,6 +98,19 @@ static struct controller_block * block_am335x_gpi_create(char *name, int argc, v
return NULL;
}
if (am335x_pinmux_gpio_offset(gpi_nr, pin_nr, &pinmux_off)) {
log_send(LOG_T_ERROR,
"%s: pin %d_%d could not be found in pinmux",
name, gpi_nr, pin_nr);
return NULL;
}
if (am335x_pinmux_set(pinmux_off, 7, AM335X_CONTROL_MODULE_PINMUX_RX)) {
log_send(LOG_T_ERROR,
"%s: Could not configure pin %d_%d as GP input",
name, gpi_nr, pin_nr);
}
base = am335x_mem(offset, AM335X_GPIO_SIZE);
if (!base) {
log_send(LOG_T_ERROR, "%s: Mapping GPIO failed", name);
......
......@@ -61,6 +61,8 @@ static struct controller_block * block_am335x_gpo_create(char *name, int argc, v
int gpo_nr;
int pin_nr;
size_t offset;
size_t pinmux_off;
int ret;
gpo_nr = va_arg(ap, int);
if (gpo_nr < 0 || gpo_nr > 3) {
......@@ -71,17 +73,25 @@ static struct controller_block * block_am335x_gpo_create(char *name, int argc, v
switch (gpo_nr) {
case 0:
offset = AM335X_GPIO0_BASE;
ret = 0;
break;
case 1:
offset = AM335X_GPIO1_BASE;
ret = am335x_cm_enable(AM335X_CM_PER_GPIO1_CLKCTRL);
break;
case 2:
offset = AM335X_GPIO2_BASE;
ret = am335x_cm_enable(AM335X_CM_PER_GPIO2_CLKCTRL);
break;
case 3:
offset = AM335X_GPIO3_BASE;
ret = am335x_cm_enable(AM335X_CM_PER_GPIO3_CLKCTRL);
break;
}
if (ret) {
log_send(LOG_T_ERROR, "%s: Could not enable clock", name);
return NULL;
}
pin_nr = va_arg(ap, int);
if (pin_nr < 0 || pin_nr > 31) {
......@@ -90,6 +100,21 @@ static struct controller_block * block_am335x_gpo_create(char *name, int argc, v
return NULL;
}
if (am335x_pinmux_gpio_offset(gpo_nr, pin_nr, &pinmux_off)) {
log_send(LOG_T_ERROR,
"%s: pin %d_%d could not be found in pinmux",
name, gpo_nr, pin_nr);
return NULL;
}
/* We don't care if the receiver is on, but try without it first*/
if (am335x_pinmux_set(pinmux_off, 7, 0) &&
am335x_pinmux_set(pinmux_off, 7, AM335X_CONTROL_MODULE_PINMUX_RX)) {
log_send(LOG_T_ERROR,
"%s: Could not configure pin %d_%d as GP output",
name, gpo_nr, pin_nr);
}
base = am335x_mem(offset, AM335X_GPIO_SIZE);
if (!base) {
log_send(LOG_T_ERROR, "%s: Mapping GPIO failed", name);
......
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment