Some small pwm improvements.

Add script to enable pwm on beaglebone

controller/am335x/am335x.c

@@ -150,7 +150,8 @@ int am335x_control_module_set(size_t offset, uint32_t bits)
 	
 	if (!control_module_base) {
 		if (am335x_control_module_init()) {
-			log_send(LOG_T_ERROR, "am335x: CONTROL_MODULE init failed");
+			log_send(LOG_T_ERROR, 
+			    "am335x: CONTROL_MODULE init failed");
 			return -1;
 		}
 	}
@@ -158,6 +159,14 @@ int am335x_control_module_set(size_t offset, uint32_t bits)
 	reg = am335x_read32(control_module_base, offset);
 	am335x_write32(control_module_base, offset, reg | bits);
 	
+	reg = am335x_read32(control_module_base, offset);
+	if ((reg & bits) != bits) {
+		log_send(LOG_T_ERROR, 
+		    "am335x: CONTROL_MODULE register 0x%x bits %08x could not be set: %08x",
+		    offset, bits, reg);
+		return -1;
+	}
+	
 	return 0;
 }
 

controller/am335x/am335x.h

@@ -86,6 +86,7 @@
 #define AM335X_PWMSS_IDVER_X_MAJOR_GET(x)	(((x) & 0x00000700) >> 8)
 #define AM335X_PWMSS_IDVER_Y_MINOR_GET(x)	(((x) & 0x0000001f) )
 #define AM335X_PWMSS_REG_SYSCONFIG	0x004
+#define AM335X_PWMSS_SYSCONFIG_IDLEMODE_SMART	0x00000008
 #define AM335X_PWMSS_REG_CLKCONFIG	0x008
 #define AM335X_PWMSS_CLKCONFIG_EPWMCLK_EN	0x00000100
 #define AM335X_PWMSS_CLKCONFIG_EPWMCLKSTOP_REQ	0x00000200

controller/am335x/block_am335x_pwm.c

@@ -275,6 +275,9 @@ static struct controller_block * block_am335x_pwm_create(char *name, int argc, v
 	    ~AM335X_PWMSS_CLKCONFIG_EPWMCLKSTOP_REQ) |
 	    AM335X_PWMSS_CLKCONFIG_EPWMCLK_EN);
 
+	am335x_write32(base, AM335X_PWMSS_REG_SYSCONFIG,
+	    AM335X_PWMSS_SYSCONFIG_IDLEMODE_SMART);
+
 	pwm->calculate = pwm_calculate;
 
 	if (controller_block_param_list_add(pwm, params))

controller/am335x/build.mk

 
-AM335X_TARGETS := $(LIBDIR)/libam335x.la $(DIR)/BB-controller-00A0.dtbo
+AM335X_TARGETS := $(LIBDIR)/libam335x.la 
+# $(DIR)/BB-controller-00A0.dtbo
 
 AM335X_BLOCKS := \
 	am335x_adc \

controller/am335x/pwm_enable.sh

+#!/bin/sh
+
+echo "0" >/sys/class/pwm/pwmchip0/export
+echo "0" >/sys/class/pwm/pwmchip0/duty_cycle
+echo "1" >/sys/class/pwm/pwmchip0/pwm0/enable
+
+echo "0" >/sys/class/pwm/pwmchip1/export
+echo "0" >/sys/class/pwm/pwmchip1/duty_cycle
+echo "1" >/sys/class/pwm/pwmchip1/pwm0/enable
+
+echo "0" >/sys/class/pwm/pwmchip2/export
+echo "0" >/sys/class/pwm/pwmchip2/duty_cycle
+echo "1" >/sys/class/pwm/pwmchip2/pwm0/enable