ADC, PWM and GPIO working

controller/am335x/block_am335x_gpi.c

@@ -46,7 +46,6 @@ static void gpi_calculate(struct controller_block *gpi)
 	
 	reg = am335x_read32(base, AM335X_GPIO_REG_DATAIN);
 	in = reg & gpi->private->bitmask;
-	log_send(LOG_T_DEBUG, "%s: 0x%lx 0x%lx %d", gpo->name, reg, gpi->private->bitmask, in);
 
 	priv->in = in;
 }

controller/am335x/block_am335x_gpo.c

@@ -50,10 +50,6 @@ static void gpo_calculate(struct controller_block *gpo)
 	    AM335X_GPIO_REG_SETDATAOUT :
 	    AM335X_GPIO_REG_CLEARDATAOUT;
 	am335x_write32(base, regoff, gpo->private->bitmask);
-
-	reg = am335x_read32(base, AM335X_GPIO_REG_DATAOUT);
-	log_send(LOG_T_DEBUG, "%s: 0x%lx 0x%lx %d", gpo->name, reg, gpi->private->bitmask,
-	out);
 }
 
 

controller/am335x/block_am335x_pwm.c

@@ -44,14 +44,14 @@ static void pwm_calculate(struct controller_block *pwm)
 	struct controller_block_private *priv = pwm->private;
 	float in;
 	uint16_t cmp;
-	uint16_t tbprd;
+	float tbprd;
 	bool sign;
 	void *base = priv->base;
-	
+
 	tbprd = priv->tbprd;
 	in = *priv->in;
 	sign = signbit(in);
-	cmp = fmax(fabsf(in * tbprd), tbprd);
+	cmp = fminf(fabsf(in) * tbprd, tbprd);
 
 	if (sign) {
 		am335x_write16(base, AM335X_PWMSS_REG_EPWM_CMPA, 0);
@@ -70,6 +70,7 @@ static void set_freq(struct controller_block *pwm)
 	int div = 1;
 	double period, freq;
 	uint16_t tbprd;
+	uint16_t aqctl;
 	
 	/* double divider for symmetric use */
 	period = AM335X_SYSCLK / (priv->freq * ( priv->sym ? 2.0 : 1.0));
@@ -87,24 +88,29 @@ static void set_freq(struct controller_block *pwm)
 	am335x_write16(base, AM335X_PWMSS_REG_EPWM_TBCTL,
 	    AM335X_PWMSS_EPWM_TBCTL_CLKDIV_SET(clkdiv) |
 	    AM335X_PWMSS_EPWM_TBCTL_SYNC0SEL_DIS |
-	    AM335X_PWMSS_EPWM_TBCTL_CTRMODE_UD);
+	    (priv->sym ? 
+	        AM335X_PWMSS_EPWM_TBCTL_CTRMODE_UD : 
+		AM335X_PWMSS_EPWM_TBCTL_CTRMODE_DN));
 	am335x_write16(base, AM335X_PWMSS_REG_EPWM_CMPCTL, 0);
 
-	am335x_write16(base, AM335X_PWMSS_REG_EPWM_AQCTLA,
-	    AM335X_PWMSS_EPWM_AQCTLA_CBD_NOP |
-	    AM335X_PWMSS_EPWM_AQCTLA_CBU_NOP |
-	    AM335X_PWMSS_EPWM_AQCTLA_CAD_SET |
-	    AM335X_PWMSS_EPWM_AQCTLA_CAU_CLR |
-	    AM335X_PWMSS_EPWM_AQCTLA_PRD_NOP |
-	    AM335X_PWMSS_EPWM_AQCTLA_PRD_NOP );
-	am335x_write16(base, AM335X_PWMSS_REG_EPWM_AQCTLB,
-	    AM335X_PWMSS_EPWM_AQCTLA_CAD_NOP |
-	    AM335X_PWMSS_EPWM_AQCTLA_CAU_NOP |
-	    AM335X_PWMSS_EPWM_AQCTLA_CBD_SET |
-	    AM335X_PWMSS_EPWM_AQCTLA_CBU_CLR |
-	    AM335X_PWMSS_EPWM_AQCTLA_PRD_NOP |
-	    AM335X_PWMSS_EPWM_AQCTLA_PRD_NOP );
-	    
+	if (priv->sym) {
+		aqctl =
+		    AM335X_PWMSS_EPWM_AQCTLA_CBD_NOP |
+		    AM335X_PWMSS_EPWM_AQCTLA_CBU_NOP |
+		    AM335X_PWMSS_EPWM_AQCTLA_CAD_SET |
+		    AM335X_PWMSS_EPWM_AQCTLA_CAU_CLR |
+		    AM335X_PWMSS_EPWM_AQCTLA_PRD_NOP;
+	} else {
+		aqctl =
+		    AM335X_PWMSS_EPWM_AQCTLA_CBD_NOP |
+		    AM335X_PWMSS_EPWM_AQCTLA_CBU_NOP |
+		    AM335X_PWMSS_EPWM_AQCTLA_CAD_SET |
+		    AM335X_PWMSS_EPWM_AQCTLA_CAU_CLR |
+		    AM335X_PWMSS_EPWM_AQCTLA_PRD_CLR;
+	}
+	am335x_write16(base, AM335X_PWMSS_REG_EPWM_AQCTLA, aqctl);
+	am335x_write16(base, AM335X_PWMSS_REG_EPWM_AQCTLB, aqctl);
+   
 	am335x_write16(base, AM335X_PWMSS_REG_EPWM_AQSFRC, 0);
 	
 	am335x_write16(base, AM335X_PWMSS_REG_EPWM_TBPRD, tbprd);