Makefile 1.04 KB
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# A Makefile to drive the Xilinx tools.
# This project reads 70MS/s data from a 10bit A/D, then applies a window
# and runs it trough a (coregen) FFT before sending the data out of
# the Ethernet port.

all: main.twr main.bit

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xst/projnav.tmp:
	mkdir -p xst/projnav.tmp
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# XST
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main.ngc:	main.xst main.prj main.vhd FFT_stream.xco eth_tx.vhd PCK_CRC32_D4.vhd LCD_Driver.vhd LCD_Controller.vhd window.vhd main.lso xst/projnav.tmp
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	xst -ifn main.xst -ofn main.syr

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# TODO: generate the window file automatically
# Generate the window
#window.vhd:	window.pl
#	perl window.pl

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# Ngdbuild
main.ngd: 	main.ngc main.ucf
	ngdbuild -dd _nog -nt timestamp -p xc3sd1800a-fg676-4 -uc main.ucf main.ngc main.ngd

# Map
main.pcf:	main.ngd
	map -p xc3sd1800a-fg676-4 -cm area -ir off -pr off -c 100 -o main_map.ncd main.ngd main.pcf

# PAR
main.ncd:	main.pcf
	par -w -ol std -t 1 main_map.ncd main.ncd main.pcf

# Timing Report
main.twr:	main.ucf main.ncd
	trce -v 3 -s 4 main.ncd -o main.twr main.pcf -ucf main.ucf

# Bitgen
main.bit:	main.ut main.ncd
	bitgen -f main.ut main.ncd